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| TLK105 Datasheet, PDF (83/99 Pages) Texas Instruments – Industrial Temp, Single Port 10/100Mbs Ethernet Physical Layer Transceiver | |||
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TLK105
TLK106
www.ti.com
9.6.11 10Mbs MII Transmit Timing
SLLSEB8A â AUGUST 2012 â REVISED MARCH 2013
Table 9-11. 10Mbs MII Transmit Timing
PARAMETER
t1
TX_CLK Low Time
t2
TX_CLK High Time
t3
TXD[3:0], TX_EN Data Setup to TX_CLK â
t4
TXD[3:0], TX_EN Data Hold from TX_CLK â
TEST CONDITIONS
10Mbs MII mode
10Mbs MII mode
10Mbs MII mode
MIN TYP MAX UNIT
190
200 210 ns
25
ns
0
ns
An attached Mac should drive the transmit signals using the positive edge of TX_CLK. As shown in
Figure 9-11, the MII signals are sampled on the falling edge of TX_CLK.
t1
t2
TX_CLK
TXD[3:0]
TX_EN
t3
t4
Valid Data
Figure 9-11. 10Mbs MII Transmit Timing
9.6.12 10Mb/s MII Receive Timing
Table 9-12. 10Mb/s MII Receive Timing
PARAMETER (1)
TEST CONDITIONS
MIN TYP MAX UNIT
t1
RX_CLK High Time
t2
RX_CLK Low Time
t3
RX_CLK rising edge delay from RXD[3:0], RX_DV Valid
10Mbs MII mode
t4
RX_CLK to RXD[3:0], RX_DV Delay
10Mbs MII mode
160 200 240 ns
100
ns
100
ns
(1) RX_CLK may be held low for a longer period of time during transition between reference and recovered clocks. Minimum high and low
times will not be violated.
t1
t2
RX_CLK
RXD[3:0]
RX_DV
t3
t4
Valid Data
Figure 9-12. 10Mb/s MII Receive Timing
T0349-01
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Electrical Specifications
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