TLK105 Datasheet, PDF (21/99 Pages) Texas Instruments – Industrial Temp, Single Port 10/100Mbs Ethernet Physical Layer Transceiver

TLK105
TLK106
www.ti.com
SLLSEB8A – AUGUST 2012 – REVISED MARCH 2013
For write transactions, the station-management entity writes data to the addressed TLK10x, thus
eliminating the requirement for MDIO Turnaround. The Turnaround time is filled by the management entity
by inserting <10>. Figure 4-4 shows the timing relationship for a typical MII register write access. The
frame structure and general read/write transactions are shown in Table 4-2, Figure 4-3, and Figure 4-4.
MII Management Serial Protocol
Read Operation
Write Operation
Table 4-2. Typical MDIO Frame Format
<idle><start><op code><device addr><reg addr><turnaround><data><idle>
<idle><01><10><AAAAA><RRRRR><Z0><xxxx xxxx xxxx xxxx><idle>
<idle><01><01><AAAAA><RRRRR><10><xxxx xxxx xxxx xxxx><idle>
MDC
MDIO ^Z
Z
(STA)
MDIO
Z
Z
(PHY)
Z 0 1 1 0 0 1 1 0 0 0 0 0 0 0Z0 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 Z
Idle
Start
Opcode
(Read)
PHY Address
(PHYAD = 0Ch)
Register Address
(00h = BMCR)
TA
Register Data
Idle
Figure 4-3. Typical MDC/MDIO Read Operation
MDC
MDIO ^Z
Z
(STA)
Z 0 1 0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0Z
Idle
Start
Opcode
(Read)
PHY Address
(PHYAD = 0Ch)
Register Address
(00h = BMCR)
TA
Register Data
Idle
Figure 4-4. Typical MDC/MDIO Write Operation
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