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| TLK100_11 Datasheet, PDF (80/88 Pages) Texas Instruments – Industrial Temp, Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver | |||
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TLK100
SLLS931B â AUGUST 2009 â REVISED DECEMBER 2009
Table 9-20. 100BASE-TX Signal Detect Timing
PARAMETER
t1
SD Internal Turn-on Time
t2
SD Internal Turn-off Time
TEST CONDITIONS
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MIN TYP MAX UNIT
100 μs
500 μs
PMD Input Pair
t1
t2
SD+ Intermal
NOTE: The signal amplitude on PMD Input Pair must be TP-PMD compliant.
Figure 9-20. 100BASE-TX Signal Detect Timing
Table 9-21. 100 Mb/s Internal Loopback Timing
PARAMETER
t1
TX_EN to RX_DV Loopback
TEST CONDITIONS
100 Mb/s internal loopback mode
T0360-01
MIN TYP MAX UNIT
272
ns
TX_CLK
TX_EN
TXD[3:0]
CRS
t1
RX_CLK
RX_DV
RXD[3:0]
T0361-01
(1) Due to the nature of the descrambler function, all 100BASE-TX Loopback modes will cause an initial dead-time of up to 550 μs
during which time no data is present at the receive MII outputs. The 100BASE-TX timing specified is based on device delays after
the initial 550µs dead-time.
(2) Measurement is made from the first rising edge of TX_CLK after assertion of TX_EN.
Figure 9-21. 100 Mb/s Internal Loopback Timing
80
Electrical Specifications
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Copyright © 2009, Texas Instruments Incorporated
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