TLK100_11 Datasheet, PDF (23/88 Pages) Texas Instruments – Industrial Temp, Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver

TLK100
www.ti.com
SLLS931B – AUGUST 2009 – REVISED DECEMBER 2009
For write transactions, the station-management entity writes data to the addressed TLK100, thus
eliminating the requirement for MDIO Turnaround. The Turnaround time is filled by the management entity
by inserting <10>. Figure 4-3 shows the timing relationship for a typical MII register write access. The
frame structure and general read/write transactions are shown in Table 4-1, Figure 4-2, and Figure 4-3.
MII Management Serial Protocol
Read Operation
Write Operation
Table 4-1. Typical MDIO Frame Format
<idle><start><op code><device addr><reg addr><turnaround><data><idle>
<idle><01><10><AAAAA><RRRRR><Z0><xxxx xxxx xxxx xxxx><idle>
<idle><01><01><AAAAA><RRRRR><10><xxxx xxxx xxxx xxxx><idle>
MDC
MDIO ^Z
Z
(STA)
MDIO
Z
Z
(PHY)
Z 0 1 1 0 0 1 1 0 0 0 0 0 0 0Z0 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 Z
Idle
Start
Opcode
(Read)
PHY Address
(PHYAD = 0Ch)
Register Address
(00h = BMCR)
TA
Register Data
Idle
Figure 4-2. Typical MDC/MDIO Read Operation
MDC
MDIO ^Z
Z
(STA)
Z 0 1 0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0Z
Idle
Start
Opcode
(Read)
PHY Address
(PHYAD = 0Ch)
Register Address
(00h = BMCR)
TA
Register Data
Idle
Figure 4-3. Typical MDC/MDIO Write Operation
4.2.1 Extended Address Space Access
The TLK100 SMI function supports read/write access to the extended register set using registers
REGCR(0x000Dh) and ADDAR(0x000Eh) and the MDIO Manageable Device (MMD) indirect method
defined in IEEE802.3ah Draft for clause 22 for accessing the clause 45 extended register set.
Accessing the standard register set, i.e. MDIO registers 0 to 31, can be performed using the normal direct
MDIO access or the indirect method, except for register REGCR(0x000Dh) and ADDAR(0x000Eh) which
can be accessed only using the normal MDIO transaction. The SMI function will ignore indirect accesses
to these registers.
REGCR(0x000Dh) is the MDIO Manageable MMD access control. In general, register REGCR(4:0) is the
device address DEVAD that directs any accesses of ADDAR(0x000Eh) register to the appropriate MMD.
Specifically, the TLK100 uses the vendor specific DEVAD[4:0] = "11111" for accesses. All accesses
through registers REGCR and ADDAR should use this DEVAD. Transactions with other DEVAD are
ignored. REGCR[15:14] holds the access function: address (00), data with no post increment (01), data
with post increment on read and writes (10) and data with post increment on writes only (11).
Copyright © 2009, Texas Instruments Incorporated
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