TLK100_11 Datasheet, PDF (59/88 Pages) Texas Instruments – Industrial Temp, Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver

TLK100
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SLLS931B – AUGUST 2009 – REVISED DECEMBER 2009
8.4.13 LED Direct Control Register (LEDCR)
This register provides the ability to directly control any or all LED outputs. The polarity, pulse width and
blink rates can be programmed using this register.
Table 8-26. LED Direct Control Register (LEDCR), address 0x0018
BIT NAME
15 LEDs Enable
14:13 Pulse Width
12 Force Interrupt
11:10 Reserved
9:8 Blink Rate
7 Reserved
6:5 LED Mode
4:3 Reserved
2 LED ACT Polarity
1 LED SPEED Polarity
0 LED LINK Polarity
DEFAULT
1,RW
0x2,RW
0,RW
0,RO
0x2,RW
0,RO
0,SOR,RW
0,RO
SOR,RW
SOR,RW
SOR,RW
DESCRIPTION
1 = Enable LEDs
0 = Disable LEDs
00 = 50mSec
01 = 100mSec
10 = 200mSec
11 = 500mSec
1 = Assert interrupt pin
0 = Normal interrupt mode
Ignore on read
00 = 20Hz (50mSec)
01 = 10Hz (100mSec)
10 = 5Hz (200mSec)
11 = 2Hz (500mSec)
Ignore on read
01 = Mode1
00 = Mode2
10 = Mode3
Ignore on read
0 = Active low
1 = Active high
0 = Active low
1 = Active high
0 = Active low
1 = Active high
8.4.14 Power Down Register (PDR)
This register provides control for doing a software reset of the PHY.
BIT NAME
15 Software Global
Reset
14:0 Reserved
Table 8-27. Power Down Register (PDR), address 0x001F
DEFAULT
0,RW,SC
0,RO
DESCRIPTION
1 = Reset PHY (Same effect as in hardware reset, including registers reset)
0 = Normal mode
Always write zero
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