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| TLK100_11 Datasheet, PDF (74/88 Pages) Texas Instruments – Industrial Temp, Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver | |||
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TLK100
SLLS931B â AUGUST 2009 â REVISED DECEMBER 2009
www.ti.com
Table 9-7. 100BASE-TX Transmit Packet Deassertion Timing
PARAMETER
TEST CONDITIONS
t1
TX_CLK to PMD Output Pair deassertion
100 Mb/s Normal mode
MIN TYP
8.6
MAX UNIT
bits
TX_CLK
TX_EN
TXD
t1
PMD Output Pair
DATA
DATA
(T/R)
(T/R)
IDLE
IDLE
Figure 9-7. 100BASE-TX Transmit Packet Latency Timing
T0344-01
Table 9-8. 100BASE-TX Transmit Timing (tR/F and Jitter)
PARAMETER
t1
100 Mb/s PMD Output Pair tR and tF (1)
100 Mb/s tR and tF Mismatch(2)
t2
100 Mb/s PMD Output Pair Transmit Jitter
TEST CONDITIONS
MIN TYP
3
4
(1) Rise and fall times taken at 10% and 90% of the +1 or -1 amplitude.
(2) Normal Mismatch is the difference between the maximum and minimum of all rise and fall times.
MAX
5
500
1.4
UNIT
ns
ps
ns
t1
+1 rise
90%
PMD Output Pair
10%
10%
+1 fall
t1
90%
â1 fall
t1
â1 rise
t1
t2
PMD Output Pair
Eye Pattern
t2
Figure 9-8. 100BASE-TX Transmit Timing (tR/F and Jitter)
T0345-01
74
Electrical Specifications
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