TLK100_11 Datasheet, PDF (54/88 Pages) Texas Instruments – Industrial Temp, Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver

TLK100
SLLS931B – AUGUST 2009 – REVISED DECEMBER 2009
8.4.2 PHY Status Register (PHYSR)
This register implements the PHY Specific Status register.
Table 8-15. PHY Status Register (PHYSR), address 0x0011
BIT
NAME
15 Reserved
14 Speed
13 Duplex
12 Page Received
11 Auto-Negotiation
Complete
10 Link Status
9 Reserved
8 MDI Crossover Status
7 Reserved
6 Sleep Mode Status
5:2 Reserved
1 Polarity
0 Jabber
DEFAULT
0,RO
0,RO
0,RO
0,RO, LH
0,RO
0,RO
0,RO
0,RO
0,RO
0,RO
0,RO
0,RO
0,RO
DESCRIPTION
Ignore on read
0 = 10Mbps
1 = 100Mbps
1 = Full duplex
0 = Half duplex
1 = Page received
0 = Page not received
1 = Auto-Negotiation completed or disabled
0 = Auto-Negotiation enabled and not completed
1 = Link is up
0 = Link is down
Ignore on read
1 = MDI-X
0 = MDI
Ignore on read
1 = Sleep
0 = Active
Ignore on read
10BT data/nlp polarity.
"1" - positive polarity.
"0" - negative polarity.
1 = Jabber
0 = No Jabber
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