TLK100_11 Datasheet, PDF (30/88 Pages) Texas Instruments – Industrial Temp, Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver

TLK100
SLLS931B – AUGUST 2009 – REVISED DECEMBER 2009
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5.2.10 Signal Detect
The signal detect function of the TLK100 is incorporated to meet the specifications mandated by the
ANSIFDDI TP-PMD Standard as well as the IEEE 802.3 100BASE-TX Standard for both voltage
thresholds and timing parameters.
The energy-detector module provides signal-strength indication in various scenarios. Because it is based
on an IIR filter, this robust energy detector has excellent reaction time and reliability. The filter output is
compared to predefined thresholds in order to decide the presence or absence of an incoming signal.
The energy detector also implements hysteresis to avoid jittering in the signal-detect indication. In addition
it has fully-programmable thresholds and listening-time periods, enabling shortening of the reaction time if
required.
5.2.11 Bad SSD Detection
A Bad Start of Stream Delimiter (Bad SSD) is any transition from consecutive idle code-groups to non-idle
code-groups which is not prefixed by the code-group pair /J/K. If this condition is detected, the TLK100
asserts MII_RX_ERR presents MII_RXD[3:0] = 1110 to the MII for the cycles that correspond to received
5B code-groups until at least two IDLE code groups are detected. In addition, the FCSCR register (0x42h)
is incremented by one for every error in the nibble.
When at least two IDLE code groups are detected, RX_ER and MII_CRS become de-asserted.
5.3 10M Squelch
The squelch feature determines when valid data is present on the differential receive inputs. The TLK100
implements a squelch to prevent impulse noise on the receive inputs from being mistaken for a valid
signal. Squelch operation is independent of the 10BASE-T operating mode. The squelch circuitry employs
a combination of amplitude and timing measurements (as specified in the IEEE 802.3 10BASE-T
standard) to determine the validity of data on the twisted-pair inputs.
The signal at the start of a packet is checked by the squelch, and any pulses not exceeding the squelch
level (either positive or negative, depending upon polarity) are rejected. When this first squelch level is
exceeded correctly, the opposite squelch level must then be exceeded no earlier than 50ns. Finally, the
signal must again exceed the original squelch level no earlier than 50ns to qualify as a valid input
waveform, and not be rejected. This checking procedure results in the typical loss of three preamble bits
at the beginning of each packet. When the transmitter is operating, five consecutive transitions are
checked before indicating that valid data is present. At this time, the squelch circuitry is reset.
5.3.1 Collision Detection
When in Half-Duplex mode, a 10BASE-T collision is detected when receive and transmit channels are
active simultaneously. Collisions are reported by the MII_COL signal on the MII.
The MII_COL signal remains set for the duration of the collision. If the PHY is receiving when a collision is
detected, it is reported immediately (through the MII_COL pin).
5.3.2 Carrier Sense
Carrier Sense (MII_CRS) may be asserted due to receive activity after valid data is detected via the
squelch function. For 10Mb/s Half Duplex operation, MII_CRS is asserted during either packet
transmission or reception. For 10Mb/s Full Duplex operation, MII_CRS is asserted only during receive
activity.
MII_CRS is de-asserted following an end-of-packet.
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Architecture
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