TLK100_11 Datasheet, PDF (68/88 Pages) Texas Instruments – Industrial Temp, Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver

TLK100
SLLS931B – AUGUST 2009 – REVISED DECEMBER 2009
8.5.29 CD Pre Test Configuration Control 2 (CDPTC2R)
This register latches the outcome of enabling the cable diagnostic pre test configuration.
Table 8-58. CD Pre Test Configuration Control 2 (CDPTC2R), address 0x010F
BIT
NAME
15:4 Reserved
3
cd_pre_test_cfg_latched
2:0 Reserved
DEFAULT
0x034,RO
0,RW
0,RO
FUNCTION
Reserved
1 = Cable Diagnostic pre test configuration is latched
0 = Cable Diagnostic pre test configuration is not latched
Reserved
8.5.30 LPF Bypass (LPFBR)
This register enables to bypass the LPF for the DSA tests.
BIT
15:11
10
NAME
Reserved
dsa_lpf_bypass
9:0 Reserved
Table 8-59. LPF Bypass (LPFBR), address 0x00AC
DEFAULT
0x0,RO
0,RW
0,RO
Reserved
1 = Bypass DSA LPF
0 = Do not bypass DSA LPF
Reserved
FUNCTION
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