English
Language : 

TLK100_11 Datasheet, PDF (56/88 Pages) Texas Instruments – Industrial Temp, Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver
TLK100
SLLS931B – AUGUST 2009 – REVISED DECEMBER 2009
8.4.4 MII Interrupt Status Register (MINTSR)
This register gives the status of the different interrupt function supported by TLK100.
Table 8-17. MII Interrupt Status Register (MINTSR), address 0x0013
BIT
NAME
15 Auto-Negotiation Error
14 Speed Changed
13 Duplex Mode Changed
12 Page Received
11 Auto-Negotiation Completed
10 Link Status Changed
9:8 Reserved
7 FIFO Overflow/Underflow
6 MDI Crossover Changed
5 Reserved
4 Sleep Mode Changed
3:2 Reserved
1 Polarity Changed
0 Jabber
DEFAULT
0, RO, LH
0,RO, LH
0,RO, LH
0,RO, LH
0,RO, LH
0,RO, LH
0,RO
0,RO, LH
0,RO, LH
0,RO
0,RO, LH
0,RO
0,RO, LH
0,RO, LH
DESCRIPTION
1 = Auto-Negotiation error has occurred
0 = Auto-Negotiation error has not occurred
1 = Link speed has changed
0 = Link speed has not changed
1 = Duplex mode has changed
0 = Duplex mode has not changed
1 = Page has been received
0 = Page has not been received
1 = Auto-Negotiation has completed
0 = Auto-Negotiation has not completed
1 = Link status has changed
0 = Link status has not changed
Ignore on read
1 = FIFO Overflow/Underflow occurred
0 = FIFO Overflow/Underflow did not occur
1 = MDI crossover has changed
0 = MDI crossover has not changed
Ignore on read
1 = Sleep mode has changed
0 = Sleep mode has not changed
Ignore on read
1 = Data polarity has changed
0 = Data polarity has not changed
1 = Jabber detected
0 = Jabber not detected
8.4.5 MII Interrupt Control Register (MINTCR)
This register enables to control the polarity and enabling the interrupts.
Table 8-18. MII Interrupt Control Register (MINTCR), address 0x0014
BIT NAME
15 INTN_OE
14 Reserved
13 Interrupt Polarity
12 INTN_OEN
11:0 Reserved
DEFAULT
0,RW
0,RO
1,RW
DESCRIPTION
Bit 15 Bit 12
0
0
0
1
1
0
1
1
1,RW
0,RO
Pin 42 Function
Power Down
Power Down
Interrupt
Power Down
Ignore on read
1 = Interrupt pin is active low
0 = Interrupt pin is active high
Refer to the table given in the bit 15 description.
Ignore on read
www.ti.com
56
Register Block
Submit Documentation Feedback
Product Folder Link(s): TLK100
Copyright © 2009, Texas Instruments Incorporated