LAN83C183 Datasheet, PDF (69/113 Pages) SMSC Corporation – FAST ETHERNET PHYSICAL LAYER DEVICE

ESD
ESD Bit
1
0
End of Stream Error
R/LT 10
Meaning
No End of Stream Delimiter detected on receive
data
Normal (default)
RPOL
Reversed Polarity Detect
RPOL Bit Meaning
1 Reversed Polarity detect
0 Normal (default)
R/LT 9
JAB
Jabber Detect
JAB Bit Meaning
1 Jabber detected
0 Normal (default)
R/LT 8
SPD_DET 100/10 Speed Detect
R/LT 7
SPD_DET Bit Meaning
1
Device in 100BASE-TX Mode (default)
0
Device in 10BASE-T Mode
DPLX_DET Duplex Detect
DPLX_DET
Bit
Meaning
1
Device in Full Duplex mode
0
Device in Half Duplex mode (default)
R/LT 6
R
Reserved
R [5:0]
These bits are reserved and must be remain at the default value of
0x0 for proper device operation.
3.3.10 Interrupt Mask Register (Register 19)
The default value for this register is 0xFFC0.
15
MASK_INT
14
MASK_LNK_FAIL
13
12
11
10
9
8
MASK_LOSS_
SYNC
MASK_CWRD
MASK_SSD
MASK_ESD MASK_RPOL MASK_JAB
7
6
5
4
3
0
MASK_SPD_DET MASK_DPLX_DET
FXLVL1
FXLVL0
Reserved
MASK_ INT
R/W 15
Interrupt Mask - Interrupt Detect
MASK_INT Bit Meaning
1
Mask interrupt when INT bit = 1 in register 18
(default)
0
No interrupt mask
SMSC DS – LAN83C183
69
Rev. 12/14/2000