LAN83C183 Datasheet, PDF (54/113 Pages) SMSC Corporation – FAST ETHERNET PHYSICAL LAYER DEVICE

3.1 BIT TYPES
Because the serial port is bidirectional (capable of both read and write operations),
there are many types of bits. The following bit type definitions are summarized in
Table 3.1:
• Write bits (W) are inputs during a write cycle and are high impedance during a
read cycle
• Read bits (R) are outputs during a read cycle and high impedance during a write
cycle
• Read/Write bits (R/W) are actually write bits that can be read out during a read
cycle
• R/WSC bits are R/W bits that are self-clearing after a set period of time or after
a specific event has completed
• R/LL bits are read bits that latch themselves when they go LOW, and they stay
LOW until read. After they are read, they are reset HIGH.
• R/LH bits are the same as R/LL bits, except that they latch HIGH.
• R/LT are read bits that latch themselves whenever they make a transition or
change value, and they stay latched until they are read. After R/LT bits are read,
they are updated to their current value.
Table 3.1 MI Register Bit Type Definition
Symbol
W
R
R/W
R/WSC
Name
Write
Read
Read/Write
Read/Write, Self-Clearing
Write Cycle
Input
No operation, Hi-Z
Input
Input
R/LL
Read/Latching LOW
No operation, Hi-Z
R/LH
Read/Latching HIGH
No operation, Hi-Z
R/LT
Read/Latching on transition No operation, Hi-Z
Definition
Read Cycle
No operation, Hi-Z
Output
Output
Output
(clears itself
after the operation completes)
Output
When the bit goes LOW, it is latched.
When the bit is read, it is updated.
Output
When the bit goes HIGH, it is latched.
When the bit Is read, it is updated.
Output
When the bit transitions, the bit is latched.
When the bit is read, the bit is updated.
SMSC DS – LAN83C183
54
Rev. 12/14/2000