LAN83C183 Datasheet, PDF (34/113 Pages) SMSC Corporation – FAST ETHERNET PHYSICAL LAYER DEVICE

1.2.11.5 AUTONEGOTIATION STATUS
To monitor the status of the AutoNegotiation process, simply read the AutoNegotiation
Acknowledgement (ANEG_ACK) bit in the MI serial port Status register. The
ANEG_ACK bit is 1 when an AutoNegotiation has been initiated and successfully
completed.
1.2.11.6 AUTONEGOTIATION ENABLE
To enable the AutoNegotiation algorithm, set the AutoNegotiation Enable bit
(ANEG_EN) in the MI serial port Control register, or assert the ANEG pin. To disable
the AutoNegotiation algorithm, clear the ANEG_EN bit, or deassert the ANEG pin.
When the AutoNegotiation algorithm is enabled, the device halts all transmissions
including link pulses for 1200 to 1500 ms, enters the Link Fail State, and restarts the
negotiation process. When the AutoNegotiation algorithm is disabled, the selection of
100 Mbits/s or
10 Mbits/s mode is determined with the SPEED bit in the MI serial port Control
register, and the selection of Half- or Full-Duplex mode determined from the state of
the DPLX bit in the MI serial port Control register.
1.2.11.7 AUTONEGOTIATION RESET
Appropriately setting the AutoNegotiation Reset (ANEG_RST) bit in the MI serial port
Control register can initiate or reset the AutoNegotiation algorithm at any time.
1.2.12 Link Indication
Receive link detect activity can be monitored through the Link Detect bit (LINK) in
the MI serial port Status register and the Link Fail Detect bit (LNK_FAIL) in the Status
Output register. Link detect activity can also be programmed to appear on the
PLED3n or PLED0n pins. To do this, appropriately set the Programmable LED Output
Select bits in the MI serial port Configuration 2 register as shown in Table 1.9. When
either the PLED3n or PLED0n pins are programmed to be a link detect output, they
are asserted LOW whenever the device is in the Link Pass State.
The PLED3 output is an open-drain pin with pullup resistor and can drive an LED
from V_DD. The PLED0 output has both pullup and pulldown driver transistors in
addition to a weak pullup resistor, so it can drive an LED from either V_DD or GND.
Both the PLED3n and PLED0n outputs can also drive another digital input. Refer to
Section 1.2.14, “LED Drivers,” page 1-36 for a description on how to program the
PLED[3:0]n pins and their default values.
SMSC DS – LAN83C183
34
Rev. 12/14/2000