LAN83C183 Datasheet, PDF (67/113 Pages) SMSC Corporation – FAST ETHERNET PHYSICAL LAYER DEVICE

PLED2_[1:0]nProgrammable LED 2 Output SelectR/W [13:12]
PLED2_1n PLED2_0n Meaning
1
1 Normal (PLED2n pin state is determined
from the LED_DEF[1:0] bits (default is
Activity).
0b11 is the default for these bits
1
0 LED tied to PLED2n blinks (toggles 100
ms LOW, then 100 ms HIGH)
0
1 LED tied to PLED2n ON steady
(PLED2n output LOW)
0
0 LED tied to PLED2n OFF steady
(PLED2n output HIGH)
PLED1_[1:0]nProgrammable LED 1 Output SelectR/W [11:10]
PLED1_1n PLED1_0n Meaning
1
1 Normal (PLED1n pin state is determined
from the LED_DEF[1:0] bits (default is
Full-Duplex).
0b11 is the default for these bits
1
0 LED tied to PLED1n blinks (toggles 100
ms LOW, then 100 ms HIGH)
0
1 LED tied to PLED1n ON steady
(PLED1n output LOW)
0
0 LED tied to PLED1n OFF steady
(PLED1n output HIGH)
PLED0_[1:0]nProgrammable LED 0 Output SelectR/W [9:8]
PLED0_1n PLED0_0n Meaning
1
1 Normal (PLED0n pin state is determined
from the LED_DEF[1:0] bits (default is
Link 10).
b11 is the default for these bits
1
0 LED tied to PLED0n blinks (toggles 100
ms LOW, then 100 ms HIGH)
0
1 LED tied to PLED0n ON steady
(PLED0n output LOW)
0
0 LED tied to PLED0n OFF steady
(PLED0n output HIGH)
LED_DEF_[1:0]
LED Normal Function Select R/W [7:6]
See Table 1.8 on page 1-36 for these bit definitions.
APOL_DIS Autopolarity Disable
R5
APOL_DIS
Bit
Meaning
1
Autopolarity correction disabled
0
Normal (default)
JAB_DIS Jabber Disable
R4
JAB_DIS Bit Meaning
1
Jabber disabled
0
Jabber enabled (default)
MREG Multiple Register Access Enable R 3
MREG Bit Meaning
1
Multiple register access enabled
0
No multiple register access (default)
SMSC DS – LAN83C183
67
Rev. 12/14/2000