LAN83C183 Datasheet, PDF (19/113 Pages) SMSC Corporation – FAST ETHERNET PHYSICAL LAYER DEVICE

of the packet is detected, CRS and RX_DV are deasserted, and RXD[3:0] is held
LOW. CRS and RX_DV also stay deasserted if the device is in the Link Fail State.
RX_ER is a receive error output that is asserted when certain errors are detected on
a data nibble. RX_ER is asserted on the falling edge of RX_CLK for the duration of
that RX_CLK clock cycle during which the nibble containing the error is output on
RXD[3:0].
The collision output, COL, is asserted whenever the collision condition is detected.
MII (10 Mbits/s) – MII 10 Mbits/s operation is identical to 100 Mbits/s operation except:
• The TX_CLK and RX_CLK clock frequency is reduced to 2.5 MHz
• TX_ER is ignored
• RX_ER is disabled and always held LOW
• Receive operation is modified as follows:
On the receive side, when the squelch circuit determines that invalid data is
present on the TP inputs, the receiver is idle. During idle, RX_CLK follows
TX_CLK, RXD[3:0] is held LOW, and CRS and RX_DV are deasserted. When a
start of packet is detected on the TP receive inputs, CRS is asserted and the
clock recovery process starts on the incoming TP input data. After the receive
clock has been recovered from the data, the RX_CLK is switched over to the
recovered clock and the data valid signal RX_DV is asserted on a falling edge
of RX_CLK. Once RX_DV is asserted, valid data is clocked out on RXD[3:0] on
the falling edge of RX_CLK. The RXD[3:0] data has the same packet structure
as the TXD[3:0] data and is formatted on RXD[3:0] as specified in IEEE 802.3
and shown in Figure 1.3. When the end of packet is detected, CRS and RX_DV
are deasserted. CRS and RX_DV also stay deasserted as long as the device is
in the Link Fail State.
1.2.2.2 FBI INTERFACE
The Five Bit Interface (also referred to as FBI) is a five-bit wide interface that is
produced when the 4B5B encoder/decoder is bypassed. The FBI is primarily used
for repeaters or Ethernet controllers that have integrated encoder/decoders.
The FBI is identical to the MII except:
• The FBI data path is five bits wide, not nibble wide like the MII
• The TX_ER pin is reconfigured to be the fifth transmit data bit (TXD4)
• The RX_ER pin is reconfigured to be the fifth receive data bit (RXD4)
• CRS is asserted as long as the device is in the Link Pass State
• COL is not valid
• RX_DV is not valid
• The TX_EN pin is ignored
There is no FBI operation in the 10 Mbits/s mode.
1.2.2.3 SELECTION OF MII OR FBI
FBI Selection – The FBI is automatically enabled when the 4B5B encoder/decoder is
bypassed. Bypassing the encoder/decoder passes the 5B symbols between the
receiver/transmitter directly to the FBI without any alterations or substitutions. To
SMSC DS – LAN83C183
19
Rev. 12/14/2000