LAN83C183 Datasheet, PDF (61/113 Pages) SMSC Corporation – FAST ETHERNET PHYSICAL LAYER DEVICE

3.3.4 PHY ID 2 Register (Register 3)
15
OUI19
7
PART3
14
OUI20
6
PART2
13
OUI21
5
PART1
12
OUI22
4
PART0
11
OUI23
3
REV3
10
OUI24
2
REV2
9
PART5
1
REV1
8
PART4
0
REV0
OUI[19:24] Company ID, Bits 19–24
R [15:10]
OUI[19:24] in this register and OUI[3:18] of the PHY ID 1 register
make up the LSI OUI, whose default value is 0x00.A07D. See the
table in the PHY ID 1 description for a description of the entire OUI
field.
PART[5:0] Manufacturer’s Part Number
R [9:4]
The default value for this field is 0x04. The table below shows the
default bit positions for the PART[5:0] field:
Bit
PART[5]
PART[4]
PART[3]
PART[2]
PART[1]
PART[0]
Default Value
0
0
0
1
0
0
Hex Value
0x0
0x4
REV[3:0] Manufacturer’s Revision Number R [3:0]
The default value for this field is 0x0.
3.3.5 AutoNegotiation Advertisement Register (Register 4)
The default value for this register is 0x01E1.
15
NP
7
TX_HDX
14
ACK
6
10_FDX
13
RF
5
10_HDX
12
10
Reserved
4
Reserved
NP
Next Page Enable
NP Bit Meaning
1 Next page¹
0 No next page (default)
1. Next page is not currently supported
R 15
ACK
Acknowledge
ACK Bit Meaning
1 Received AutoNegotiation word recognized
0 Not recognized (default)
R 14
9
8
T4
TX_FDX
1
0
CSMA
SMSC DS – LAN83C183
61
Rev. 12/14/2000