LAN83C183 Datasheet, PDF (66/113 Pages) SMSC Corporation – FAST ETHERNET PHYSICAL LAYER DEVICE

TLVL[3:0]
Transmit Output Level Adjust R/W [5:2]
The transmit output current level is derived from an internal reference
voltage and the external resistor on the REXT pin. The transmit level
can be adjusted with either the external resistor on the REXT pin, or
the four Transmit Level Adjust bits (TLVL[3:0]), as shown. The adjust-
ment range is approximately -14% to +16% in 2% steps.
TLVL[3:0] Bits
0b0000
0b0001
0b0010
0b0011
0b0100
0b0101
0b0110
0b0111
0b1000
(default)
0b1001
0b1010
0b1011
0b1100
0b1101
0b1110
0b1111
Gain
1.16
1.14
1.12
1.10
1.08
1.06
1.04
1.02
1.00
0.98
0.96
0.94
0.92
0.90
0.88
0.86
TRF[1:0]
Transmit Rise/Fall Time Adjust R/W [1:0]
TRF[1:0]
Bits Adjustment
0b11 -0.25 ns
0b10 +0.0 ns
(default)
0b01 +.25 ns
0b00 +.50 ns
3.3.8 Configuration 2 Register (Register 17)
The default value for this register is 0xFF00.
15
14
13
12
11
10
9
8
PLED3_1n PLED3_0n PLED2_1n PLED2_0n PLED1_1n PLED1_0n PLED0_1n PLED0_0n
7
4
LED_DEF1 LED_DEF0 APOL_DIS JAB_DIS
3
MREG
2
1
0
Reserved
PLED3_[1:0]nProgrammable LED 3 Output SelectR/W [15:14]
PLED3_1n PLED3_0n Meaning
1
1 Normal (PLED3n pin state is determined
from the LED_DEF[1:0] bits (default is
LINK100).
0b11 is the default for these bits
1
0 LED tied to PLED3n blinks (toggles 100
ms LOW, then 100 ms HIGH)
0
1 LED tied to PLED3n ON steady
(PLED3n output LOW)
0
0 LED tied to PLED3n OFF steady
(PLED3n output HIGH)
SMSC DS – LAN83C183
66
Rev. 12/14/2000