HD66781 Datasheet, PDF (68/196 Pages) Renesas Technology Corp – 720-channel Source Driver for a-Si TFT/Low Temperature Poly-Si TFT Panels with 262,144-color display RAM

HD66781
Preliminary
Power control 1 (R100h)
R/W RS IB15 IB14 IB13 IB12 IB11 IB10 IB9 IB8 IB7 IB6 IB5 IB4 IB3 IB2 IB1 IB0
W
1
DC DC
43
0
0
0
SAP SAP SAP
210
0
AP AP AP
210
0
DS
TB
SLP STB
STB: When STB = 1, the HD66781 enters into the standby mode. In the standby mode, display operation
is completely halted, and all internal operations including the internal R-C oscillator and reception of
external clock pulse, are halted. Only instructions to release from the standby mode (STB = 0) and to start
oscillation are accepted during the standby mode.
In the standby mode, a serial transfer to the gate driver/power supply IC cannot be made and it requires
retransfer after release from the standby mode. Also in the standby mode, any change in the GRAM data or
instruction setting cannot be made, but GRAM data are retained.
SLP: When SLP = 1, the HD66781 enters into the sleep mode. In the sleep mode, internal display
operation is halted except the R-C oscillator to reduce current consumption. No change is made to the
GRAM data or instructions during the sleep mode, and the GRAM data and the instructions are retained.
DSTB: When DSTB = 1, the HD66781 enters into the deep standby mode, where the power supply for the
internal logic is turned off to save more power than the standby mode. The GRAM data and the instruction
setting are destroyed in the deep standby mode and it requires resetting after release from the deep standby
mode. Also in the deep standby mode, a serial transfer to the gate driver cannot be made and it requires a
retransfer after the release from the deep standby mode.
AP[2:0]: Adjust the amount of constant current in the operational amplifier in the liquid crystal drive
power supply. When the amount of constant current is set large, the liquid crystal drive capacity will be
enhanced and the display quality will improve, while the current consumption will increase. Select an
optimum amount of current taking both the display quality and the current consumption into account.
When no display operation is required, set AP[2:0] = “3’h0” to halt the operation of operational amplifier
and step-up circuits to reduce the current consumption. Also if AP[2:0] is set to other than 0, the clock for
the step-up circuit DCCLK is output.
SAP[2:0]: Adjust the amount of constant current in the operational amplifier of source driver. When the
amount of constant current is set large, the liquid crystal drive capacity is enhanced and the display quality
will improve, while the current consumption will increase. Select an optimum amount of current taking
both the display quality and the current consumption into account. When no display operation is required,
set SAP[2:0] = “3’h0” to halt the operation of operational amplifier and step-up circuits to reduce the
current consumption.
DC[4:3]: Select the frequency of clocks for the step-up circuit (DCCLK). If the DCCLK frequency is set
high, display quality is enhanced due to increased drive capacity of step-up circuit, while power
consumption will be increased. Make an adjustment taking both display quality and power consumption
into consideration.
Rev.0.5, July.31.2003, page 68 of 196