HD66781 Datasheet, PDF (154/196 Pages) Renesas Technology Corp – 720-channel Source Driver for a-Si TFT/Low Temperature Poly-Si TFT Panels with 262,144-color display RAM

HD66781
Preliminary
CS
in put
WR
in put
DB 17-0
in put
1
2
3
4
5
6
7
8
index
R202
RAM
data
upper
(1)
RAM
data
lower
(1)
RAM
data
upper
(n)
RAM
data
lower
(n)
RAM
data
upper
(1)
RAM
data
lower
(1)
RAM wri t e
execut ion t ime
RAM
data
upper
(n)
RAM
data
lower
(n)
RAM wri t e
execut ion t ime
RAM ad dr ess
(AC16-0)
RAM wri t e dat a
(18 x n bit s)
18’h00000 –
18’h0000n
RA M
data
(1) - (n)
RA M
data
(n+1) – (2n)
18’h00100 –
18’h0010n
High-speed consecutive access to RAM (9-bit interface)
Note 1) The high-speed RAM write mode (HWM=1) writes data to RAM by n words. In the 9-bit interface
mode, data are written to RAM 2xn times per line.
Notes to the high-speed RAM write mode
1.
RAM write is executed by line. If write operation is terminated before it reaches the end of
horizontal line of the window-address area, it is not guaranteed that data are properly written on
that line.
2.
The index register for the RAM data write (202H), if selected, executes the first data write
operation. This setting does not allow RAM data read. HWM must be set to 0 during RAM read.
3.
The high-speed RAM write mode is not compatible with the normal RAM write mode. Whenever
switching to the other mode, it is necessary to set the address before starting RAM write.
Table 67
BGR function
Write mask function
RAM address set
RAM read
RAM write
Window address
External display interface
AM
Normal RAM Write (HWM=0)
Available
Available
Set by words
Set by words
Set by words
Set by words
(minimum range: 1 word x 1 line)
Available
AM = 1/0
High-Speed RAM Write (HWM=1)
Available
Available
Set by words
Not available
Set by lines
Set by words
(minimum range: 8 word x 1 line)
Available
AM = 0
Rev.0.5, July.31.2003, page 154 of 196