HD66781 Datasheet, PDF (46/196 Pages) Renesas Technology Corp – 720-channel Source Driver for a-Si TFT/Low Temperature Poly-Si TFT Panels with 262,144-color display RAM

HD66781
Display Control 2 (R008h)
Preliminary
R/W RS
W1
IB15 IB14 IB13 IB12 IB11 IB10 IB9 IB8 IB7 IB6 IB5 IB4 IB3 IB2 IB1 IB0
0 0 0 0 FP3 FP2 FP1 FP0 0 0 0 0 BP3 BP2 BP1 BP0
FP [3:0]: Set the number of lines for a front porch (a blank period made before the end of display).
BP [3:0]: Set the number of lines for a back porch (a blank period made after the beginning of display).
In the external display interface mode, a back porch (BP) period starts at the falling edge of VSYNC and
display operation starts after the back porch period. A front porch (FP) period starts after the numbers of
raster-rows set with NL bit are driven for display. After the front porch period, a blank period continues
until the next VSYNC input.
Table 20
FP [3:0]
BP [3:0]
4’h0
4’h1
4’h2
4’h3
4’h4
4’h5
4’h6
4’h7
4’h8
4’h9
4’hA
4’hB
4’hC
4’hD
4’hE
4’hF
Number of Front porch line
Number of Back porch line
Setting disabled
Setting disabled
2 lines
3 lines
4 lines
5 lines
6 lines
7 lines
8 lines
9 lines
10 lines
11 lines
12 lines
13 lines
14 lines
Setting disabled
VSYNC
Back porch
Display
Area
Front porch
Note: The output timing to the LCD panel is delayed by 2 lines
in relation to the input-synchronizing signal
Set BP, FP, and MP within the range indicated below.
Table 21
Internal clock operation
RGB interface
VSYNC interface
FLD = 2’h1
FLD = 2’h3
BP ≥ 2 lines
BP = 3 lines
BP ≥ 2 lines
BP ≥ 2 lines
FP ≥ 2 lines
FP = 5 lines
FP ≥ 2 lines
FP ≥ 2 lines
FP+BP ≤ 16 lines
FP+BP ≤ 16 lines
FP+BP = 16 lines
Rev.0.5, July.31.2003, page 46 of 196