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HD66781 Datasheet, PDF (44/196 Pages) Renesas Technology Corp – 720-channel Source Driver for a-Si TFT/Low Temperature Poly-Si TFT Panels with 262,144-color display RAM
HD66781
Table 16 OSD image 3 magnification in the vertical direction (RSEV)
RSEV [7:6]
2’h0
2’h1
2’h2
2’h3
Magnification
No resizing (x1)
2 times (x2)
4 times (x4)
Setting disabled
Preliminary
Display Control 1 (R007h)
R/W RS
W1
IB15 IB14 IB13 IB12 IB11 IB10 IB9 IB8 IB7 IB6 IB5 IB4 IB3 IB2 IB1 IB0
0 OSD OSD OSD 0 0 0 BASE 0 0 0 DTE 0 0 D1 D0
E2 E1 E0
E
D[1:0]: The graphics display is shown when D[1] = 1, and turned off when D[1] = 0. When setting D[1] =
0, the data are retained in GRAM. This means the graphics display is instantly shown when setting D[1] to
1. When D[1] is 0 (i.e. the display is not shown) all source outputs are set to the GND level. This reduces
the charged/discharged current on LCD, which is generated during liquid crystal alternate drive.
When D= 2’b01, the display operation is being executed inside the HD66781 even while the external
display is turned off. When D = 2’b00, both internal and external display operations are halted.
In combination with GON and DTE bits, D1-0 bits control ON/OFF of display. For details, see the
“Instruction Setting”(p.185) section.
Table 17
D[1:0]
Source output
HD66781
internal operation
Gate control signal/Power supply IC, LCD
panel control signal
(FLM, CL1/SFTCLK1, 2, DCCLK, EQ)
2’h0
GND
Halt
Halt
2’h1
GND
Continue
Continue
2’h2
Non-lit display
Continue
Continue
2’h3
Display
Continue
Continue
Note 1) Data from the microcomputer can be written to GRAM irrespective of D bit setting.
Note 2) D = 2’h00 during the standby mode. In this case, the register setting of D bit is not changed.
Note 3) A picture displayed when D = 2’b11 is specified by the BASEE setting.
Rev.0.5, July.31.2003, page 44 of 196