HD66781 Datasheet, PDF (120/196 Pages) Renesas Technology Corp – 720-channel Source Driver for a-Si TFT/Low Temperature Poly-Si TFT Panels with 262,144-color display RAM

HD66781
Preliminary
Data transmission synchronization in 9-bit bus interface mode
The HD66781 supports the data transmission synchronization function, which resets the upper/lower
counters that count the number of data transmission of upper/lower 9 bits in the 9-bit bus interface mode.
When a discrepancy occurs in the data transmission of the upper/lower 9 bits due to effects from noise and
so on, the “000” H instruction is written 4 times consecutively to reset the upper/lower counters so that data
transmission restarts with the upper 9-bit transmission. Periodical execution of synchronization function
allows the display system to recover from excursion.
RS
RD
WR
DB17~9
Upper
Lower
“000”H “000”H “000”H “000”H
Upper Lower Upper
(9- bit transmission synchronization)
9-bit Transfer Synchronization
Rev.0.5, July.31.2003, page 120 of 196