HD66781 Datasheet, PDF (65/196 Pages) Renesas Technology Corp – 720-channel Source Driver for a-Si TFT/Low Temperature Poly-Si TFT Panels with 262,144-color display RAM

HD66781
Gate Driver/LTPS LCD Panel Interface Control 10 (R01Bh)
Preliminary
R/W RS
W1
IB15 IB14 IB13 IB12 IB11 IB10 IB9 IB8 IB7 IB6 IB5 IB4 IB3 IB2 IB1 IB0
EQW EQW EQW
0 0 0 0 0 _{E2 E1 E0} 0 0 0 ⁰
00
00
EQWE[2:0]: Specify the width of “High” of EQ DISPTMG during display operation with DOTCLK (DM
= 2’h1).
See the figures (page 66, 67) with regard to how the signal waveform of each gate driver and LTPS LCD
panel interface are controlled by these settings. Also see “Equalizing Function” for details on equalization.
Table 43
EQWE[2:0] EQ “High” width
3’h0
0 clock
3’h1
1 clock
3’h2
2 clocks
3’h3
3 clocks
3’h4
4 clocks
3’h5
5 clocks
3’h6
6 clocks
3’h7
7 clocks
Note 1) The clocks in the tables are DOTCLK / division ratio for the 1H period, measured from the source
output change.
Rev.0.5, July.31.2003, page 65 of 196