CP3BT10 Datasheet, PDF (25/210 Pages) National Semiconductor (TI) – Reprogrammable Connectivity Processor with Bluetooth and USB Interfaces

6.0 Memory
The CP3BT10 supports a uniform 16M-byte linear address are reserved and must not be read or written. The BIU
space. Table 8 lists the types of memory and peripherals zones are regions of the address space that share the same
that occupy this memory space. Unlisted address ranges control bits in the Bus Interface Unit (BIU).
Table 8 CP3BT10 Memory Map
Start
Address
00 0000h
04 0000h
0E 0000h
0E 2000h
0E 8000h
0E 9200h
0E C000h
0E E800h
0E EC00h
0E F000h
0E F140h
0E F180h
0E F200h
10 0000h
40 0000h
80 0000h
FF 0000h
FF FB00h
FF FC00h
End
Address
03 FFFFh
0D FFFFh
0E 1FFFh
0E 7FFFh
0E 91FFh
0E BFFFh
0E E7FFh
0E EBFFh
0E EFFFh
0E F0FFh
0E F17Fh
0E F1FFh
0F FFFFh
3F FFFFh
7F FFFFh
FE FFFFh
FF FAFFh
FF FBFFh
FF FFFFh
Size in
Bytes
256K
640K
8K
24K
4.5K
11.5K
10K
1K
1K
320
64
128
67.5K
3072K
4096K
8128K
64256
256
1K
Description
BIU Zone
On-chip Flash Program Memory, including Boot
Memory
Reserved
On-chip Flash Data Memory
Reserved
Static Zone 0
(mapped internally
in IRE and ERE
mode; mapped to
the external bus in
DEV mode)
Bluetooth Data RAM
N/A
Reserved
System RAM
Bluetooth Lower Link Controller Sequencer RAM
Reserved
Reserved
Reserved
Bluetooth Lower Link Controller Registers
Reserved
Reserved
External Memory Zone 1
Static Zone 1
External Memory Zone 2
Static Zone 2
BIU Peripherals
I/O Expansion
I/O Zone
Peripherals and Other I/O Ports
N/A
6.1 OPERATING ENVIRONMENT
The operating environment controls whether external mem-
ory is supported and whether the reset vector jumps to a
code space intended to support In-System Programming
(ISP). Up to 12M of external memory space is available.
The operating mode of the device is controlled by the states
on the ENV[2:0] pins at reset and the states of the EMPTY
bits in the Protection Word, as shown in Table 9. Internal
pullups on the ENV[2:0] pins select IRE mode or ISP mode
if these pins are allowed to float.
When ENV[2:0] = 111b, IRE mode is selected unless the
EMPTY bits in the Protection word indicate that the program
flash memory is empty (unprogrammed), in which case ISP
mode is selected. When ENV[2:0] = 011b, ERE mode is se-
lected unless the EMPTY bits indicate that the program
flash memory is empty, in which case ISP mode is selected.
When ENV[2:0] = 110b, ISP mode is selected without re-
gard to the states of the EMPTY bits. See Section 8.4.2 for
more details.
In the DEV environment, the on-chip flash memory is dis-
abled, and the corresponding region of the address space
is mapped to external memory.
Table 9 Operating Environment Selection
ENV[2:0] EMPTY
Operating Environment
111
No Internal ROM enabled (IRE) mode
011
No External ROM enabled (ERE) mode
000
N/A Development (DEV) mode
110
N/A In-System-Programming (ISP) mode
111
Yes In-System-Programming (ISP) mode
011
Yes In-System-Programming (ISP) mode
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