CP3BT10 Datasheet, PDF (116/210 Pages) National Semiconductor (TI) – Reprogrammable Connectivity Processor with Bluetooth and USB Interfaces

the UART Frame Select register. The value of the ninth bit the control registers, called UXB9 and URB9. Parity is not
received is read from URB9 in the UART Status Register. generated or verified in this mode.
19.2.3 Diagnostic Mode
The Diagnostic mode is available for testing of the UART. In
this mode, the TXD and RXD pins are internally connected
together, and data shifted out of the transmit shift register is
immediately transferred to the receive shift register. This
mode supports only the 9-bit data format with no parity. The
number of start and stop bits is programmable.
Start
3
Bit
Start
3a
Bit
9-Bit Data
9-Bit Data
1S
2S
DS065
19.2.4 Frame Format Selection
The format shown in Figure 43 consists of a start bit, seven
data bits (excluding parity), and one or two stop bits. If parity
bit generation is enabled by setting the UPEN bit, a parity bit
is generated and transmitted following the seven data bits.
Start
1
Bit
Start
1a
Bit
7-Bit Data
7-Bit Data
1S
2S
Figure 45. 9-bit Data Frame Options
19.2.5 Baud Rate Generator
The Baud Rate Generator creates the basic baud clock from
the System Clock. The System Clock is passed through a
two-stage divider chain consisting of a 5-bit baud rate pres-
caler (UPSC) and an 11-bit baud rate divisor (UDIV).
The relationship between the 5-bit prescaler select (UPSC)
setting and the prescaler factors is shown in Table 44.
Table 44 Prescaler Factors
Start
1b
Bit
Start
1c
Bit
7-Bit Data
7-Bit Data
PA 1S
PA
2S
DS063
Figure 43. 7-Bit Data Frame Options
The format shown in Figure 44 consists of one start bit,
eight data bits (excluding parity), and one or two stop bits. If
parity bit generation is enabled by setting the UPEN bit, a
parity bit is generated and transmitted following the eight
data bits.
Start
2
Bit
8-Bit Data
1S
Start
2a
Bit
8-Bit Data
2S
Start
2b
Bit
8-Bit Data
PA 1S
Start
2c
Bit
8-Bit Data
PA
2S
DS064
Figure 44. 8-Bit Data Frame Options
The format shown in Figure 45 consists of one start bit, nine
data bits, and one or two stop bits. This format also supports
the UART attention feature. When operating in this format,
all eight bits of UTBUF and URBUF are used for data. The
ninth data bit is transmitted and received using two bits in
Prescaler Select
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
Prescaler Factor
No clock
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
6.5
7
7.5
8
8.5
9
9.5
10
10.5
11
11.5
12
12.5
13
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