CP3BT10 Datasheet, PDF (187/210 Pages) National Semiconductor (TI) – Reprogrammable Connectivity Processor with Bluetooth and USB Interfaces

27.7 I/O PORT TIMING
Table 59 I/O Port Signals
Symbol Figure
Description
t_IS
76 Input Setup Time
t_IH
76 Input Hold Time
t_COv1 76 Output Valid Time
Reference
I/O Port Input Signals
Before Falling Edge (FE)
on System Clock
After FE on System Clock
I/O Port Output Signals
After FE on System Clock
Min (ns)
22.5
0
-
Max (ns)
-
-
3
CLK
Port Input
Port Output
t_IS
t_lH
t_COv1
Figure 76. I/O Port Timing
t_COv1
DS100
187
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