MC9S08QG8 Datasheet, PDF (99/300 Pages) Freescale Semiconductor, Inc – 8-BIT HCS08 Central Processor Unit

Chapter 7 Central Processor Unit (S08CPUV2)
Table 7-2. HCS08 Instruction Set Summary (Sheet 5 of 7)
Source
Form
Operation
Description
Effect
on CCR
VH I NZC
LDX #opr8i
LDX opr8a
LDX opr16a
LDX oprx16,X
LDX oprx8,X
LDX ,X
LDX oprx16,SP
LDX oprx8,SP
LSL opr8a
LSLA
LSLX
LSL oprx8,X
LSL ,X
LSL oprx8,SP
LSR opr8a
LSRA
LSRX
LSR oprx8,X
LSR ,X
LSR oprx8,SP
MOV opr8a,opr8a
MOV opr8a,X+
MOV #opr8i,opr8a
MOV ,X+,opr8a
MUL
NEG opr8a
NEGA
NEGX
NEG oprx8,X
NEG ,X
NEG oprx8,SP
NOP
NSA
ORA #opr8i
ORA opr8a
ORA opr16a
ORA oprx16,X
ORA oprx8,X
ORA ,X
ORA oprx16,SP
ORA oprx8,SP
PSHA
PSHH
PSHX
PULA
PULH
PULX
ROL opr8a
ROLA
ROLX
ROL oprx8,X
ROL ,X
ROL oprx8,SP
Load X (Index Register
Low) from Memory
Logical Shift Left
(Same as ASL)
Logical Shift Right
Move
Unsigned multiply
Negate
(Two’s Complement)
No Operation
Nibble Swap
Accumulator
Inclusive OR Accumulator
and Memory
Push Accumulator onto
Stack
Push H (Index Register
High) onto Stack
Push X (Index Register
Low) onto Stack
Pull Accumulator from
Stack
Pull H (Index Register
High) from Stack
Pull X (Index Register
Low) from Stack
Rotate Left through Carry
X ← (M)
C
b7
0
b0
0
b7
C
b0
(M)_destination ← (M)_source
H:X ← (H:X) + 0x0001 in
IX+/DIR and DIR/IX+ Modes
X:A ← (X) × (A)
M ← – (M) = 0x00 – (M)
A ← – (A) = 0x00 – (A)
X ← – (X) = 0x00 – (X)
M ← – (M) = 0x00 – (M)
M ← – (M) = 0x00 – (M)
M ← – (M) = 0x00 – (M)
Uses 1 Bus Cycle
A ← (A[3:0]:A[7:4])
A ← (A) | (M)
Push (A); SP ← (SP) – 0x0001
Push (H); SP ← (SP) – 0x0001
Push (X); SP ← (SP) – 0x0001
SP ← (SP + 0x0001); Pull (A)
SP ← (SP + 0x0001); Pull (H)
SP ← (SP + 0x0001); Pull (X)
C
b7
b0
0––
– IMM
DIR
EXT
IX2
IX1
IX
SP2
SP1
AE ii
2
BE dd
3
CE hh ll 4
DE ee ff 4
EE ff
3
FE
3
9EDE ee ff 5
9EEE ff
4
––
DIR
38 dd
5
INH
48
1
INH
58
1
IX1
68 ff
5
IX
78
4
SP1
9E68 ff
6
––0
DIR
34 dd
5
INH
44
1
INH
54
1
IX1
64 ff
5
IX
74
4
SP1
9E64 ff
6
0––
– DIR/DIR
DIR/IX+
IMM/DIR
IX+/DIR
4E dd dd 5
5E dd
5
6E ii dd 4
7E dd
5
– 0 – – – 0 INH
42
5
––
DIR
30 dd
5
INH
40
1
INH
50
1
IX1
60 ff
5
IX
70
4
SP1
9E60 ff
6
– – – – – – INH
9D
1
– – – – – – _INH
62
1
0––
– IMM
DIR
EXT
IX2
IX1
IX
SP2
SP1
– – – – – _{– INH}
AA ii
2
BA dd
3
CA hh ll 4
DA ee ff 4
EA ff
3
FA
3
9EDA ee ff 5
9EEA ff
4
87
2
– – – – – – _INH
8B
2
– – – – – – _INH
89
2
– – – – – – _INH
86
3
– – – – – – _INH
8A
3
– – – – – – _INH
88
3
––
DIR
39 dd
5
INH
49
1
INH
59
1
IX1
69 ff
5
IX
79
4
SP1
9E69 ff
6
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 1.01
Freescale Semiconductor
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