MC9S08QG8 Datasheet, PDF (15/300 Pages) Freescale Semiconductor, Inc – 8-BIT HCS08 Central Processor Unit

Section Number
Title
Page
Chapter 14
Serial Communications Interface (S08SCIV3)
14.1 Introduction ...................................................................................................................................191
14.1.1 Features ...........................................................................................................................194
14.1.2 Modes of Operation ........................................................................................................194
14.1.3 Block Diagram ................................................................................................................195
14.2 Register Definition ........................................................................................................................197
14.2.1 SCI Baud Rate Registers (SCIBDH, SCIBHL) ..............................................................197
14.2.2 SCI Control Register 1 (SCIC1) .....................................................................................198
14.2.3 SCI Control Register 2 (SCIC2) .....................................................................................199
14.2.4 SCI Status Register 1 (SCIS1) ........................................................................................200
14.2.5 SCI Status Register 2 (SCIS2) ........................................................................................202
14.2.6 SCI Control Register 3 (SCIC3) .....................................................................................202
14.2.7 SCI Data Register (SCID) ...............................................................................................203
14.3 Functional Description ..................................................................................................................204
14.3.1 Baud Rate Generation .....................................................................................................204
14.3.2 Transmitter Functional Description ................................................................................204
14.3.3 Receiver Functional Description .....................................................................................206
14.3.4 Interrupts and Status Flags ..............................................................................................207
14.4 Additional SCI Functions ..............................................................................................................208
14.4.1 8- and 9-Bit Data Modes .................................................................................................208
14.4.2 Stop Mode Operation ......................................................................................................209
14.4.3 Loop Mode ......................................................................................................................209
14.4.4 Single-Wire Operation ....................................................................................................209
Chapter 15
Serial Peripheral Interface (S08SPIV3)
15.1 Introduction ...................................................................................................................................211
15.1.1 Features ...........................................................................................................................213
15.1.2 Block Diagrams ..............................................................................................................213
15.1.3 SPI Baud Rate Generation ..............................................................................................215
15.2 External Signal Description ..........................................................................................................216
15.2.1 SPSCK — SPI Serial Clock ............................................................................................216
15.2.2 MOSI — Master Data Out, Slave Data In ......................................................................216
15.2.3 MISO — Master Data In, Slave Data Out ......................................................................216
15.2.4 SS — Slave Select ...........................................................................................................216
15.3 Register Definition ........................................................................................................................217
15.3.1 SPI Control Register 1 (SPIC1) ......................................................................................217
15.3.2 SPI Control Register 2 (SPIC2) ......................................................................................218
15.3.3 SPI Baud Rate Register (SPIBR) ....................................................................................219
15.3.4 SPI Status Register (SPIS) ..............................................................................................220
15.3.5 SPI Data Register (SPID) ................................................................................................221
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 1.01
Freescale Semiconductor
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