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MC9S08QG8 Datasheet, PDF (267/300 Pages) Freescale Semiconductor, Inc – 8-BIT HCS08 Central Processor Unit
Appendix A Electrical Characteristics
Table A-7. XOSC and ICS Specifications (Temperature Range = –40 to 85°C Ambient)
Characteristic
Symbol
Min
Typ1
Max
Unit
Total deviation of DCO output from trimmed frequency4
At 8 MHz over full voltage and temperature range
At 8 MHz and 3.6 V from 0 to 70°C
∆fdco_t
—
–1.0 to +0.5 ± 2
%fdco
±0.5
±1
FLL acquisition time 4,6
tAcquire
1.5
ms
Long term jitter of DCO output clock (averaged over 2-ms interval) 7 CJitter
—
0.02
0.2
%fdco
1 Data in Typical column was characterized at 3.0 V, 25°C or is typical recommended value.
2 When ICS is configured for FEE or FBE mode, input clock source must be divisible using RDIV to within the range of 31.25 kHz
to 39.0625 kHz.
3 See crystal or resonator manufacturer’s recommendation.
4 This parameter is characterized and not tested on each device.
5 Proper PC board layout procedures must be followed to achieve specifications.
6 This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or changing
from FLL disabled (FBELP, FBILP) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as the reference,
this specification assumes it is already running.
7 Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum fBus.
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise
injected into the FLL circuitry via VDD and VSS and variation in crystal oscillator frequency increase the CJitter percentage for a
given interval.
EXTAL
XOSC
RF
XTAL
RS
Crystal or Resonator
C1
C2
Figure A-7. Typical Crystal or Resonator Circuit
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 1.01
Freescale Semiconductor
267