MC9S08QG8 Datasheet, PDF (160/300 Pages) Freescale Semiconductor, Inc – 8-BIT HCS08 Central Processor Unit

Inter-Integrated Circuit (S08IICV1)
11.1.4 Block Diagram
Figure 11-4 is a block diagram of the IIC.
ADDRESS
ADDR_DECODE
INTERRUPT
DATA BUS
DATA_MUX
CTRL_REG
FREQ_REG
ADDR_REG
STATUS_REG
DATA_REG
INPUT
SYNC
CLOCK
CONTROL
START
STOP
ARBITRATION
CONTROL
IN/OUT
DATA
SHIFT
REGISTER
ADDRESS
COMPARE
SCL
SDA
Figure 11-4. IIC Functional Block Diagram
11.2 External Signal Description
This section describes each user-accessible pin signal.
11.2.1 SCL — Serial Clock Line
The bidirectional SCL is the serial clock line of the IIC system.
11.2.2 SDA — Serial Data Line
The bidirectional SDA is the serial data line of the IIC system.
11.3 Register Definition
This section consists of the IIC register descriptions in address order.
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 1.01
160
Freescale Semiconductor