MC9S08QG8 Datasheet, PDF (161/300 Pages) Freescale Semiconductor, Inc – 8-BIT HCS08 Central Processor Unit

Inter-Integrated Circuit (S08IICV1)
Refer to the direct-page register summary in the Memory chapter of this data sheet for the absolute address
assignments for all IIC registers. This section refers to registers and control bits only by their names. A
Freescale-provided equate or header file is used to translate these names into the appropriate absolute
addresses.
11.3.1 IIC Address Register (IICA)
7
6
5
4
3
2
1
0
R
0
ADDR
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 11-5. IIC Address Register (IICA)
Table 11-2. IICA Register Field Descriptions
Field
Description
7:1
IIC Address Register — The ADDR contains the specific slave address to be used by the IIC module. This is
ADDR[7:1] the address the module will respond to when addressed as a slave.
11.3.2 IIC Frequency Divider Register (IICF)
7
6
5
4
3
2
1
0
R
MULT
ICR
W
Reset
0
0
0
0
0
0
0
0
Figure 11-6. IIC Frequency Divider Register (IICF)
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 1.01
Freescale Semiconductor
161