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MC908AP32CFBE Datasheet, PDF (91/324 Pages) Freescale Semiconductor, Inc – The following revision history table summarizes changes contained in this document. For your convenience, the page number designators have been linked to the appropriate location. | |||
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CGM Registers
6.5.2 PLL Bandwidth Control Register
The PLL bandwidth control register (PBWC):
⢠Selects automatic or manual (software-controlled) bandwidth control mode
⢠Indicates when the PLL is locked
⢠In automatic bandwidth control mode, indicates when the PLL is in acquisition or tracking mode
⢠In manual operation, forces the PLL into acquisition or tracking mode
Address: $0037
Bit 7
6
5
4
3
2
1
Bit 0
Read:
LOCK
0
0
0
0
AUTO
ACQ
R
Write:
Reset: 0
0
0
0
0
0
0
= Unimplemented
R
= Reserved
Figure 6-5. PLL Bandwidth Control Register (PBWCR)
AUTO â Automatic Bandwidth Control Bit
This read/write bit selects automatic or manual bandwidth control. When initializing the PLL for manual
operation (AUTO = 0), clear the ACQ bit before turning on the PLL. Reset clears the AUTO bit.
1 = Automatic bandwidth control
0 = Manual bandwidth control
LOCK â Lock Indicator Bit
When the AUTO bit is set, LOCK is a read-only bit that becomes set when the VCO clock, CGMVCLK,
is locked (running at the programmed frequency). When the AUTO bit is clear, LOCK reads as logic 0
and has no meaning. The write one function of this bit is reserved for test, so this bit must always be
written a 0. Reset clears the LOCK bit.
1 = VCO frequency correct or locked
0 = VCO frequency incorrect or unlocked
ACQ â Acquisition Mode Bit
When the AUTO bit is set, ACQ is a read-only bit that indicates whether the PLL is in acquisition mode
or tracking mode. When the AUTO bit is clear, ACQ is a read/write bit that controls whether the PLL is
in acquisition or tracking mode.
In automatic bandwidth control mode (AUTO = 1), the last-written value from manual operation is
stored in a temporary location and is recovered when manual operation resumes. Reset clears this bit,
enabling acquisition mode.
1 = Tracking mode
0 = Acquisition mode
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor
91
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