MC908AP32CFBE Datasheet, PDF (243/324 Pages) Freescale Semiconductor, Inc – The following revision history table summarizes changes contained in this document. For your convenience, the page number designators have been linked to the appropriate location.

MMBR2
0
0
0
0
1
1
1
1
MMBR1
0
0
1
1
0
0
1
1
Program Algorithm
Table 14-2. MMIIC Baud Rate Selection
MMBR0 Divider
0
20
1
40
0
80
1
160
0
320
1
640
0
1280
1
2560
8 MHz
400kHz
200kHz
100kHz
50kHz
25kHz
12.5kHz
6.25kHz
3.125kHz
MMIIC Baud Rates for Bus Clocks:
4 MHz
2 MHz
1 MHz
200kHz
100kHz
50kHz
100kHz
50kHz
25kHz
50kHz
25kHz
12.5kHz
25kHz
12.5kHz
6.25kHz
12.5kHz
6.25kHz
3.125kHz
6.25kHz
3.125kHz
1.5625kHz
3.125kHz
1.5625kHz
0.78125kHz
1.5625kHz
0.78125kHz
0.3906kHz
NOTE
The frequency of the MMIIC baud rate is only guaranteed for 100kHz to
10kHz. The divider is available for the flexibility on bus frequency selection.
14.7 Program Algorithm
When the MMIIC module detects an arbitration loss in master mode, it releases both SDA and SCL lines
immediately. But if there are no further STOP conditions detected, the module will hang up. Therefore, it
is recommended to have time-out software to recover from this condition. The software can start the
time-out counter by looking at the MMBB (bus busy) flag and reset the counter on the completion of one
byte transmission. If a time-out has occurred, software can clear the MMEN bit (disable MMIIC module)
to release the bus, and hence clear the MMBB flag. This is the only way to clear the MMBB flag by
software if the module hangs up due to a no STOP condition received. The MMIIC can resume operation
again by setting the MMEN bit.
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor
241