MC908AP32CFBE Datasheet, PDF (47/324 Pages) Freescale Semiconductor, Inc – The following revision history table summarizes changes contained in this document. For your convenience, the page number designators have been linked to the appropriate location.

FLASH Memory
2.5.7 FLASH Block Protect Register
The FLASH block protect register is implemented as an 8-bit I/O register. The value in this register
determines the starting address of the protected range within the FLASH memory.
Address:
Read:
Write:
Reset:
$FE09
Bit 7
6
5
4
3
2
1
BPR7
BPR6
BPR5
BPR4
BPR3
BPR2
BPR1
0
0
0
0
0
0
0
Figure 2-5. FLASH Block Protect Register (FLBPR)
Bit 0
BPR0
0
BPR[7:0] — FLASH Block Protect Bits
BPR[7:1] represent bits [15:9] of a 16-bit memory address. Bits [8:0] are logic 0’s.
Start address of FLASH block protect
16-bit memory address
000000000
BPR[7:1]
BPR0 is used only for BPR[7:0] = $FF, for no block protection.
The resultant 16-bit address is used for specifying the start address of the FLASH memory for block
protection. The FLASH is protected from this start address to the end of FLASH memory, at $FFFF.
With this mechanism, the protect start address can be X000, X200, X400, X0600, X800, XA00, XC00,
or XE00 (at page boundaries — 512 bytes) within the FLASH memory.
Examples of protect start address:
Table 2-2 FLASH Block Protect Range
BPR[7:0]
Protected Range
$00 to $09
The entire FLASH memory is protected.
$0A or $0B
(0000 101x)
$0A00 to $FFFF
$0C or $0D
(0000 110x)
$0C00 to $FFFF
and so on...
$FA or $FB
(1111 1101x)
$FA00 to $FFFF
$FC or $FD or $FE
$FFCF to $FFFF
$FF
The entire FLASH memory is NOT protected.⁽¹⁾
1. Except for the mask option register ($FFCF) and the 48-byte user vectors
($FFD0–$FFFF). These FLASH locations are always protected.
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor
47