MC908AP32CFBE Datasheet, PDF (136/324 Pages) Freescale Semiconductor, Inc – The following revision history table summarizes changes contained in this document. For your convenience, the page number designators have been linked to the appropriate location.

Timer Interface Module (TIM)
9.4 Functional Description
Figure 9-1 shows the structure of the TIM. The central component of the TIM is the 16-bit TIM counter
that can operate as a free-running counter or a modulo up-counter. The TIM counter provides the timing
reference for the input capture and output compare functions. The TIM counter modulo registers,
TMODH:TMODL, control the modulo value of the TIM counter. Software can read the TIM counter value
at any time without affecting the counting sequence.
The two TIM channels (per timer) are programmable independently as input capture or output compare
channels.
INTERNAL
BUS CLOCK
TSTOP
TRST
PRESCALER
PRESCALER SELECT
PS2
PS1
PS0
16-BIT COUNTER
16-BIT COMPARATOR
TMODH:TMODL
CHANNEL 0
16-BIT COMPARATOR
TCH0H:TCH0L
16-BIT LATCH
CHANNEL 1
16-BIT COMPARATOR
TCH1H:TCH1L
16-BIT LATCH
ELS0B ELS0A
CH0F
MS0A
MS0B
ELS0B ELS0A
MS0A
CH1F
TOF
INTERRUPT
TOIE
LOGIC
TOV0
CH0MAX
CH0IE
TOV1
CH1MAX
CH01IE
CH1IE
PORT
LOGIC
INTERRUPT
LOGIC
PORT
LOGIC
INTERRUPT
LOGIC
Figure 9-1. TIM Block Diagram
Figure 9-2 summarizes the timer registers.
NOTE
References to either timer 1 or timer 2 may be made in the following text by
omitting the timer number. For example, TSC may generically refer to both
T1SC and T2SC.
T[1,2]CH0
T[1,2]CH1
MC68HC908AP Family Data Sheet, Rev. 4
136
Freescale Semiconductor