MC908AP32CFBE Datasheet, PDF (133/324 Pages) Freescale Semiconductor, Inc – The following revision history table summarizes changes contained in this document. For your convenience, the page number designators have been linked to the appropriate location.

F LASH
PAGE BOUNDARY
ONE PAGE = 512 BYTES
CONTROL: 9 BYTES
DATA ARRAY
DATA ARRAY
DATA ARRAY
ROM-Resident Routines
PAGE BOUNDARY
Figure 8-10. EE_WRITE FLASH Memory Usage
The coding example below uses the $EE00–$EFFF page for data storage. The data array size is 15
bytes, and the bus speed is 4.9152 MHz. The coding assumes the data block is already loaded in RAM,
with the address pointer, FILE_PTR, pointing to the first byte of the data block.
ORG
RAM
:
FILE_PTR:
BUS_SPD
DS.B 1
; Indicates 4x bus frequency
DATASIZE
DS.B 1
; Data size to be programmed
START_ADDR DS.W 1
; FLASH starting address
DATAARRAY
DS.B 15 ; Reserved data array
EE_WRITE
EQU
FLASH_START EQU
$FF36
$EE00
ORG
FLASH
INITIALISATION:
MOV #20, BUS_SPD
MOV #15, DATASIZE
LDHX #FLASH_START
STHX START_ADDR
RTS
MAIN:
BSR INITIALISATION
:
:
LHDX #FILE_PTR
JSR EE_WRITE
NOTE
The EE_WRITE routine is unable to check for incorrect data blocks, such
as the FLASH page boundary address and data size. It is the responsibility
of the user to ensure the starting address indicated in the data block is at
the FLASH page boundary and the data size is 7 to 15. If the FLASH page
is already programmed with a data array with a different size, the
EE_WRITE call will be ignored.
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor
133