MC908AP32CFBE Datasheet, PDF (152/324 Pages) Freescale Semiconductor, Inc – The following revision history table summarizes changes contained in this document. For your convenience, the page number designators have been linked to the appropriate location.

Timebase Module (TBM)
OSCCLK
÷2 ÷2 ÷2
From OSC module
(See Chapter 5 Oscillator (OSC).)
÷2
÷8
÷2
÷ 16
÷2
÷ 32
÷2 ÷2 ÷2 ÷2 ÷2
÷ 64
÷ 2048
TBON
TBMINT
÷2 ÷2 ÷2 ÷2
÷2
÷2
÷2
÷ 32768 ÷ 65536 ÷ 131072 ÷ 262144
000
001
010
011
1 0 0 ^SEL
101
110
111
Figure 10-1. Timebase Block Diagram
TBIF
TBIE
R
10.4 Timebase Register Description
The timebase has one register, the TBCR, which is used to enable the timebase interrupts and set the
rate.
Address: $0051
Bit 7
6
5
4
3
2
1
Bit 0
Read: TBIF
0
TBR2
TBR1
TBR0
TBIE
TBON
R
Write:
TACK
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
R
= Reserved
Figure 10-2. Timebase Control Register (TBCR)
TBIF — Timebase Interrupt Flag
This read-only flag bit is set when the timebase counter has rolled over.
1 = Timebase interrupt pending
0 = Timebase interrupt not pending
MC68HC908AP Family Data Sheet, Rev. 4
152
Freescale Semiconductor