MC908AP32CFBE Datasheet, PDF (106/324 Pages) Freescale Semiconductor, Inc – The following revision history table summarizes changes contained in this document. For your convenience, the page number designators have been linked to the appropriate location.

System Integration Module (SIM)
CLI
LDA #$FF
INT1
PSHH
PULH
RTI
BACKGROUND
ROUTINE
INT1 INTERRUPT SERVICE ROUTINE
INT2
PSHH
INT2 INTERRUPT SERVICE ROUTINE
PULH
RTI
Figure 7-11. Interrupt Recognition Example
The LDA opcode is prefetched by both the INT1 and INT2 RTI instructions. However, in the case of the
INT1 RTI prefetch, this is a redundant operation.
NOTE
To maintain compatibility with the M6805 Family, the H register is not
pushed on the stack during interrupt entry. If the interrupt service routine
modifies the H register or uses the indexed addressing mode, software
should save the H register and then restore it prior to exiting the routine.
7.5.1.2 SWI Instruction
The SWI instruction is a non-maskable instruction that causes an interrupt regardless of the state of the
interrupt mask (I bit) in the condition code register.
NOTE
A software interrupt pushes PC onto the stack. A software interrupt does
not push PC – 1, as a hardware interrupt does.
7.5.2 Interrupt Status Registers
The flags in the interrupt status registers identify maskable interrupt sources. Table 7-3 summarizes the
interrupt sources and the interrupt status register flags that they set. The interrupt status registers can be
useful for debugging.
MC68HC908AP Family Data Sheet, Rev. 4
106
Freescale Semiconductor