MC908AP32CFBE Datasheet, PDF (32/324 Pages) Freescale Semiconductor, Inc – The following revision history table summarizes changes contained in this document. For your convenience, the page number designators have been linked to the appropriate location.

Memory
Addr.
Register Name
Bit 7
6
Read:
$000D
Unimplemented Write:
Reset:
Read:
$000E
Unimplemented Write:
Reset:
Read:
$000F
Unimplemented Write:
Reset:
$0010
Read:
SPI Control Register
(SPCR)
Write:
SPRIE
R
Reset: 0
0
$0011
SPI Status and Control ^Read:
Register Write:
(SPSCR) _Reset:
SPRF
0
ERRIE
0
$0012
Read: R7
R6
SPI Data Register
(SPDR)
Write:
T7
T6
Reset:
$0013
Read:
SCI Control Register 1
(SCC1)
Write:
Reset:
LOOPS
0
ENSCI
0
$0014
Read:
SCI Control Register 2
(SCC2)
Write:
SCTIE
TCIE
Reset: 0
0
Read: R8
$0015
SCI Control Register 3
(SCC3)
Write:
T8
Reset: U
U
Read: SCTE
TC
$0016 SCI Status Register 1 (SCS1) Write:
Reset: 1
1
Read:
0
0
$0017 SCI Status Register 2 (SCS2) Write:
Reset: 0
0
$0018
Read: R7
R6
SCI Data Register
(SCDR)
Write:
T7
T6
Reset:
Read:
0
0
$0019
SCI Baud Rate Register
(SCBR)
Write:
Reset: 0
0
U = Unaffected
X = Indeterminate
5
4
3
SPMSTR
1
OVRF
CPOL
0
MODF
CPHA
1
SPTE
0
R5
T5
TXINV
0
SCRIE
0
DMARE
0
SCRF
0
1
R4
R3
T4
T3
Unaffected by reset
M
WAKE
0
0
ILIE
TE
0
0
DMATE ORIE
0
0
IDLE
OR
0
0
0
0
0
0
0
0
0
R5
R4
R3
T5
T4
T3
Unaffected by reset
SCP1
SCP0
R
0
0
0
= Unimplemented
2
1
Bit 0
SPWOM
0
MODFEN
0
R2
T2
SPE
0
SPR1
0
R1
T1
SPTIE
0
SPR0
0
R0
T0
ILTY
PEN
PTY
0
0
0
RE
RWU
SBK
0
0
0
NEIE
FEIE
PEIE
0
0
0
NF
FE
PE
0
0
0
0
BKF
RPF
0
0
0
R2
R1
R0
T2
T1
T0
SCR2
SCR1
SCR0
0
0
0
R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 2 of 9)
MC68HC908AP Family Data Sheet, Rev. 4
32
Freescale Semiconductor