MC908AP32CFBE Datasheet, PDF (229/324 Pages) Freescale Semiconductor, Inc – The following revision history table summarizes changes contained in this document. For your convenience, the page number designators have been linked to the appropriate location.

Table 13-4. SPI Master Baud Rate Selection
SPR1 and SPR0
00
01
10
11
Baud Rate Divisor (BD)
2
8
32
128
I/O Registers
Use this formula to calculate the SPI baud rate:
Baud rate = ^{C-----2G-----M}_×----B-O----DU-----T--
where:
CGMOUT = base clock output of the clock generator module (CGM)
BD = baud rate divisor
13.13.3 SPI Data Register
The SPI data register consists of the read-only receive data register and the write-only transmit data
register. Writing to the SPI data register writes data into the transmit data register. Reading the SPI data
register reads data from the receive data register. The transmit data and receive data registers are
separate registers that can contain different values. (See Figure 13-2.)
Address: $0012
Bit 7
6
5
4
3
2
1
Bit 0
Read: R7
R6
R5
R4
R3
R2
R1
R0
Write: T7
T6
T5
T4
T3
T2
T1
T0
Reset:
Unaffected by reset
Figure 13-15. SPI Data Register (SPDR)
R7–R0/T7–T0 — Receive/Transmit Data Bits
NOTE
Do not use read-modify-write instructions on the SPI data register since the
register read is not the same as the register written.
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor
227