MC908AS60ACFU Datasheet, PDF (76/414 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

EEPROM-1 Memory
6.4.5.2 EEPROM-1 Programming
The unprogrammed or erase state of an EEPROM bit is a logic 1. Programming changes the state to a
logic 0. Only EEPROM bytes in the non-protected blocks and the EE1NVR register can be programmed.
Use the following procedure to program a byte of EEPROM:
1. Clear EERAS1 and EERAS0 and set EELAT in the EE1CR.^(A)
NOTE
If using the AUTO mode, also set the AUTO bit during Step 1.
2. Write the desired data to the desired EEPROM address.^(B)
3. Set the EEPGM bit.^(C) Go to Step 7 if AUTO is set.
4. Wait for time, t_EEPGM, to program the byte.
5. Clear EEPGM bit.
6. Wait for time, t_EEFPV, for the programming voltage to fall. Go to Step 8.
7. Poll the EEPGM bit until it is cleared by the internal timer.^(D)
8. Clear EELAT bits.^(E)
NOTE
A. EERAS1 and EERAS0 must be cleared for programming. Setting the
EELAT bit configures the address and data buses to latch data for
programming the array. Only data with a valid EEPROM-1 address will be
latched. If EELAT is set, other writes to the EE1CR will be allowed after a
valid EEPROM-1 write.
B. If more than one valid EEPROM write occurs, the last address and data
will be latched overriding the previous address and data. Once data is
written to the desired address, do not read EEPROM-1 locations other than
the written location. (Reading an EEPROM location returns the latched data
and causes the read address to be latched).
C. The EEPGM bit cannot be set if the EELAT bit is cleared or a non-valid
EEPROM address is latched. This is to ensure proper programming
sequence. Once EEPGM is set, do not read any EEPROM-1 locations;
otherwise, the current program cycle will be unsuccessful. When EEPGM
is set, the on-board programming sequence will be activated.
D. The delay time for the EEPGM bit to be cleared in AUTO mode is less
than t_EEPGM. However, on other MCUs, this delay time may be different.
For forward compatibility, software should not make any dependency on
this delay time.
E. Any attempt to clear both EEPGM and EELAT bits with a single
instruction will only clear EEPGM. This is to allow time for removal of high
voltage from the EEPROM-1 array.
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
76
Freescale Semiconductor