MC908AS60ACFU Datasheet, PDF (42/414 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Memory Map
Addr.
Register Name
$0032
Timer A Channel 4 Status
and Control Register (TASC4)
$0033
Timer A Channel 4 Register
High (TACH4H)
$0034
Timer A Channel 4 Register
Low (TACH4L)
$0035
Timer A Channel 5 Status
and Control Register (TASC5)
$0036
Timer A Channel 5 Register
High (TACH5H)
$0037
Timer A Channel 5 Register
Low (TACH5L)
$0038
Analog-to-Digital Status and
Control Register (ADSCR)
$0039
Analog-to-Digital Data
Register (ADR)
$003A
Analog-to-Digital Input Clock
Register (ADICLK)
$003B
BDLC Analog and Roundtrip
Delay Register (BARD)
$003C
BDLC Control Register 1
(BCR1)
$003D
BDLC Control Register 2
(BCR2)
$003E
BDLC State Vector Register
(BSVR)
$003F
BDLC Data Register
(BDR)
$0040
Timer B Status and Control
Register (TBSCR)
$0041
Timer B Counter Register
High (TBCNTH)
$0042
Timer B Counter Register
Low (TBCNTL)
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Bit 7
CH4F
0
Bit 15
Bit 7
CH5F
0
Bit 15
Bit 7
COCO
R
AD7
ADIV2
ATE
IMSG
ALOOP
0
R
BD7
TOF
0
Bit 15
Bit 7
6
CH4IE
14
6
CH5IE
14
6
AIEN
AD6
ADIV1
RXPOL
CLKS
DLOOP
0
R
BD6
TOIE
14
6
5
MS4B
13
5
0
R
13
5
ADCO
AD5
ADIV0
0
R
R1
RX4XE
I3
R
BD5
TSTOP
13
5
4
MS4A
12
4
MS5A
12
4
ADCH4
AD4
ADICLK
0
R
R0
NBFS
I2
R
BD4
0
TRST
12
4
3
ELS4B
11
3
ELS5B
11
3
ADCH3
AD3
0
BO3
0
R
TEOD
I1
R
BD3
0
R
11
3
2
ELS4A
10
2
ELS5A
10
2
ADCH2
AD2
0
BO2
0
R
TSIFR
I0
R
BD2
PS2
10
2
1
Bit 0
TOV4 CH4MAX
9
Bit 8
1
Bit 0
TOV5 CH5MAX
9
Bit 8
1
Bit 0
ADCH1 ADCH0
AD1
AD0
0
0
BO1
BO0
IE
WCM
TMIFR1 TMIFR0
0
0
R
R
BD1
BD0
PS1
PS0
9
Bit 8
1
Bit 0
= Unimplemented
R
= Reserved
Figure 2-2. I/O Data, Status and Control Registers (Sheet 4 of 5)
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
42
Freescale Semiconductor