MC908AS60ACFU Datasheet, PDF (247/414 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Table 21-2. Prescaler Selection
PPS[2:0]
000
001
010
011
100
101
110
111
PIT Clock Source
Internal Bus Clock ÷1
Internal Bus Clock ÷ 2
Internal Bus Clock ÷ 4
Internal Bus Clock ÷ 8
Internal Bus Clock ÷ 16
Internal Bus Clock ÷ 32
Internal Bus Clock ÷ 64
Internal Bus Clock ÷ 64
I/O Registers
21.7.2 PIT Counter Registers
The two read-only PIT counter registers contain the high and low bytes of the value in the PIT counter.
Reading the high byte (PCNTH) latches the contents of the low byte (PCNTL) into a buffer. Subsequent
reads of PCNTH do not affect the latched PCNTL value until PCNTL is read. Reset clears the PIT counter
registers. Setting the PIT reset bit (PRST) also clears the PIT counter registers.
NOTE
If you read PCNTH during a break interrupt, be sure to unlatch PCNTL by
reading PCNTL before exiting the break interrupt. Otherwise, PCNTL
retains the value latched during the break.
Address: $004C
Bit 7
6
5
4
3
2
Read: Bit 15
14
13
12
11
10
Write:
Reset: 0
0
0
0
0
0
1
Bit 0
9
Bit 8
0
0
Address: $004D
Bit 7
6
5
4
3
2
Read: Bit 15
14
13
12
11
10
1
Bit 0
9
Bit 8
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 21-4. PIT Counter Registers (PCNTH–PCNTL)
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor
247