MC908AS60ACFU Datasheet, PDF (293/414 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

23.13.6 MSCAN08 Receiver Interrupt Enable Register
Programmer’s Model of Control Registers
Address: $0505
Bit 7
6
5
4
3
2
1
Read:
Write:
Reset:
WUPIE
0
RWRNIE TWRNIE
0
0
RERRIE
0
TERRIE
0
BOFFIE
0
OVRIE
0
Figure 23-20. Receiver Interrupt Enable Register (CRIER)
Bit 0
RXFIE
0
WUPIE — Wakeup Interrupt Enable
1 = A wakeup event will result in a wakeup interrupt.
0 = No interrupt will be generated from this event.
RWRNIE — Receiver Warning Interrupt Enable
1 = A receiver warning status event will result in an error interrupt.
0 = No interrupt is generated from this event.
TWRNIE — Transmitter Warning Interrupt Enable
1 = A transmitter warning status event will result in an error interrupt.
0 = No interrupt is generated from this event.
RERRIE — Receiver Error Passive Interrupt Enable
1 = A receiver error passive status event will result in an error interrupt.
0 = No interrupt is generated from this event.
TERRIE — Transmitter Error Passive Interrupt Enable
1 = A transmitter error passive status event will result in an error interrupt.
0 = No interrupt is generated from this event.
BOFFIE — Bus-Off Interrupt Enable
1 = A bus-off event will result in an error interrupt.
0 = No interrupt is generated from this event.
OVRIE — Overrun Interrupt Enable
1 = An overrun event will result in an error interrupt.
0 = No interrupt is generated from this event.
RXFIE — Receiver Full Interrupt Enable
1 = A receive buffer full (successful message reception) event will result in a receive interrupt.
0 = No interrupt will be generated from this event.
NOTE
The CRIER register is held in the reset state when the SFTRES bit in
CMCR0 is set.
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor
293