MC908AS60ACFU Datasheet, PDF (125/414 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

ILOP — Illegal Opcode Reset Bit
1 = Last reset caused by an illegal opcode
0 = POR or read of SRSR
ILAD — Illegal Address Reset Bit (opcode fetches only)
1 = Last reset caused by an opcode fetch from an illegal address
0 = POR or read of SRSR
LVI — Low-Voltage Inhibit Reset Bit
1 = Last reset was caused by the LVI circuit
0 = POR or read of SRSR
SIM Registers
9.7.3 SIM Break Flag Control Register
The SIM break control register contains a bit that enables software to clear status bits while the MCU is
in a break state.
Address: $FE03
Bit 7
6
5
4
3
2
1
Bit 0
Read:
BCFE
R
R
R
R
R
R
R
Write:
Reset: 0
0
R
= Reserved
Figure 9-19. SIM Break Flag Control Register (SBFCR)
BCFE — Break Clear Flag Enable Bit
This read/write bit enables software to clear status bits by accessing status registers while the MCU is
in a break state. To clear status bits during the break state, the BCFE bit must be set.
1 = Status bits clearable during break
0 = Status bits not clearable during break
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor
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