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MC908AS60ACFU Datasheet, PDF (367/414 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers
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Electrical Specifications
28.1.4 5.0 Volt DC Electrical Characteristics
Characteristic(1)
Output High Voltage
(ILOAD = –2.0 mA) All Ports
(ILOAD = –5.0 mA) All Ports
Total source current
Output Low Voltage
(ILOAD = 1.6 mA) All Ports
(ILOAD = 10.0 mA) All Ports
Total sink current
Input High Voltage
All Ports, IRQs, RST, OSC1
Input Low Voltage
All Ports, IRQs, RST, OSC1
VDD Supply Current
Run(2)
Wait (3)
Stop(4)
LVI enabled, TA = 25°C
LVI disabled, TA = 25°C
LVI enabled, –40°C to +125°C
LVI disabled, –40°C to +125°C
I/O Ports Hi-Z Leakage Current
Input Current
Capacitance
Ports (As Input or Output)
Low-Voltage Reset Inhibit
POR ReArm Voltage(6)
POR Reset Voltage(7)
POR Rise Time Ramp Rate(8)
High COP Disable Voltage(9)
Monitor mode entry voltage on IRQ(10)
Pull resistor (KBD[4:0])
Symbol
Min
Typical
Max
Unit
VOH
VDD –0.8
—
VDD –1.5
—
IOH(TOT)
—
—
—
V
—
10
mA
VOL
—
—
—
—
IOL(TOT)
—
—
VIH
0.7 x VDD
—
0.4
V
1.5
15
mA
VDD
V
VIL
VSS
—
0.3 x VDD
V
—
25
35
mA
—
14
20
mA
IDD(5)
—
100
400
μA
—
35
50
μA
—
500
μA
—
100
μA
IL
–1
—
1
μA
IIN
–1
—
1
μA
COUT
—
CIN
—
—
12
8
pF
(trip)
(recover)
VLVI
3.80
—
—
—
—
4.49
V
VPOR
0
—
200
mV
VPORRST
0
—
800
mV
RPOR
0.02
—
—
V/ms
VHI
VDD + 3.0
—
VDD + 4.5
V
VHI
VDD + 3.0
—
VDD + 4.5
V
RPU
—
100
—
kΩ
1. VDD = 5.0 Vdc ± 10%, VSS = 0 Vdc, TA = –40°C to +TA(MAX), unless otherwise noted.
2. Run (Operating) IDD measured using external square wave clock source (fBUS = 8.4 MHz). All inputs 0.2 V from rail. No dc loads. Less than
100 pF on all outputs. CL = 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects run IDD. Measured with all
modules enabled. Typical values at midpoint of voltage range, 25°C only.
3. Wait IDD measured using external square wave clock source (fBUS = 8.4 MHz). All inputs 0.2 Vdc from rail. No dc loads. Less than 100 pF on
all outputs, CL = 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects wait IDD. Measured with all modules
enabled. Typical values at midpoint of voltage range, 25°C only.
4. Stop IDD measured with OSC1 = VSS.
5. Although IDD is proportional to bus frequency, a current of several mA is present even at very low frequencies.
6. Maximum is highest voltage that POR is guaranteed.
7. Maximum is highest voltage that POR is possible.
8. If minimum VDD is not reached before the internal POR reset is released, RST must be driven low externally until minimum VDD is reached.
9. See 15.8 COP Module During Break Interrupts. VHI applied to RST.
10. See Monitor mode description within Chapter 15 Computer Operating Properly (COP). VHI applied to IRQ or RST
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor
367
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