MC908AS60ACFU Datasheet, PDF (251/414 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

READ DDRA ($0004)
WRITE DDRA ($0004)
RESET
WRITE PTA ($0000)
DDRAx
PTAx
Port A
PTAx
READ PTA ($0000)
Figure 22-4. Port A I/O Circuit
When bit DDRAx is a logic 1, reading address $0000 reads the PTAx data latch. When bit DDRAx is a
logic 0, reading address $0000 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 22-1 summarizes the operation of the port A pins.
Table 22-1. Port A Pin Functions
DDRA
Bit
PTA
Bit
I/O Pin Mode
Accesses to
DDRA
Read/Write
0
X
Input, Hi-Z
DDRA[7:0]
1
X
Output
DDRA[7:0]
X = don’t care
Hi-Z = high impedance
1. Writing affects data register, but does not affect input.
Accesses to PTA
Read
Pin
PTA[7:0]
Write
PTA[7:0]⁽¹⁾
PTA[7:0]
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor
251