MC908AS60ACFU Datasheet, PDF (238/414 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Timer Interface Module B (TIMB)
20.8.3 TIMB Counter Modulo Registers
The read/write TIMB modulo registers contain the modulo value for the TIMB counter. When the TIMB
counter reaches the modulo value, the overflow flag (TOF) becomes set and the TIMB counter resumes
counting from $0000 at the next timer clock. Writing to the high byte (TBMODH) inhibits the TOF bit and
overflow interrupts until the low byte (TBMODL) is written. Reset sets the TIMB counter modulo registers.
Register Name and Address
TBMODH — $0043
Bit 7
6
5
4
3
2
1
Bit 0
Read:
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10
BIT 9
BIT 8
Write:
Reset: 1
1
1
1
1
1
1
1
Register Name and Address
TBMODL — $0044
Bit 7
6
5
4
3
2
1
Bit 0
Read:
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Write:
Reset: 1
1
1
1
1
1
1
1
Figure 20-6. TIMB Counter Modulo Registers (TBMODH and TBMODL)
NOTE
Reset the TIMB counter before writing to the TIMB counter modulo registers.
20.8.4 TIMB Channel Status and Control Registers
Each of the TIMB channel status and control registers:
• Flags input captures and output compares
• Enables input capture and output compare interrupts
• Selects input capture, output compare or PWM operation
• Selects high, low or toggling output on output compare
• Selects rising edge, falling edge or any edge as the active input capture trigger
• Selects output toggling on TIMB overflow
• Selects 0% and 100% PWM duty cycle
• Selects buffered or unbuffered output compare/PWM operation
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
238
Freescale Semiconductor