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MC68HC16Z1CAG16 Datasheet, PDF (66/500 Pages) Freescale Semiconductor, Inc – M68HC16Z Series users manual
Freescale Semiconductor, Inc.
4.3.1 Address Extension
All CPU16 resources used to generate addresses are effectively 20 bits wide. These
resources include the index registers, program counter, and stack pointer. All address-
ing modes use 20-bit addresses.
Twenty-bit addresses are formed from a 16-bit byte address generated by an individ-
ual CPU16 register and a 4-bit address extension contained in an associated exten-
sion field. The byte address corresponds to ADDR[15:0] and the address extension
corresponds to ADDR[19:16].
4.3.2 Extension Fields
Each of the six address extension fields is used for a different type of access. All but
EK are associated with particular CPU16 registers. There are several ways to manip-
ulate extension fields and the address map. Refer to the CPU16 Reference Manual
(CPU16RM/AD) for detailed information.
4.4 Data Types
The CPU16 uses the following types of data:
• Bits
• 4-bit signed integers
• 8-bit (byte) signed and unsigned integers
• 8-bit, 2-digit binary coded decimal (BCD) numbers
• 16-bit (word) signed and unsigned integers
• 32-bit (long word) signed and unsigned integers
• 16-bit signed fractions
• 32-bit signed fractions
• 36-bit signed fixed-point numbers
• 20-bit effective addresses
There are eight bits in a byte and 16 bits in a word. Bit set and clear instructions use
both byte and word operands. Bit test instructions use byte operands.
Negative integers are represented in two’s complement form. Four-bit signed integers,
packed two to a byte, are used only as X and Y offsets in MAC and RMAC operations.
32-bit integers are used only by extended multiply and divide instructions, and by the
associated LDED and STED instructions.
BCD numbers are packed, two digits per byte. BCD operations use byte operands.
Signed 16-bit fractions are used by the fractional multiplication instructions, and as
multiplicand and multiplier operands in the MAC unit. Bit 15 is the sign bit, and there
is an implied radix point between bits 15 and 14. There are 15 bits of magnitude. The
range of values is –1 ($8000) to 1 – 2-15 ($7FFF).
Signed 32-bit fractions are used only by the fractional multiplication and division in-
structions. Bit 31 is the sign bit. An implied radix point lies between bits 31 and 30.
There are 31 bits of magnitude. The range of values is –1 ($80000000) to 1 – 2-31
($7FFFFFFF).
CENTRAL PROCESSOR UNIT
M68HC16 Z SERIES
4-6
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