MC68HC16Z1CAG16 Datasheet, PDF (440/500 Pages) Freescale Semiconductor, Inc – M68HC16Z Series users manual

Freescale Semiconductor, Inc.
MODF — Mode Fault Flag
0 = Normal operation.
1 = Another SPI node requested to become the network SPI master while the SPI
was enabled in master mode (SS input taken low).
The SPI asserts MODF when the SPI is in master mode (MSTR = 1) and the SS input
pin is negated by an external driver.
D.7.15 SPI Data Register
SPDR — SPI Data Register
$YFFC3E
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
UPPB[7:0]
LOWB[7:0]
RESET:
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
UPPB — Upper Byte
In 16-bit transfer mode, the upper byte contains the most significant eight bits of the
transmitted or received data. Bit 15 of the SPDR is the MSB of the 16-bit data.
LOWB — Lower Byte
In 8-bit transfer mode, the lower byte contains the transmitted or received data. MSB
in 8-bit transfer mode is bit 7 of the SPDR. In 16-bit transfer mode, the lower byte holds
the least significant eight bits of the data.
D-66
REGISTER SUMMARY
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M68HC16 Z SERIES
USER’S MANUAL